Computer Organization is an important topic in the Bihar STET Computer Science syllabus. It deals with the internal structure and working of a computer system, including CPU, ALU, control unit, registers, memory hierarchy, cache memory, instruction cycle, addressing modes, I/O organization, buses and computer architecture concepts.
These notes provide concise study material and important MCQs for Bihar STET Computer Science 2026 preparation.
Computer Organization – Important Topics
- Computer System Organization
- CPU and its Components
- ALU and Control Unit
- Registers
- Instruction Cycle
- Instruction Format
- Addressing Modes
- Memory Hierarchy
- Cache Memory
- RAM and ROM
- Virtual Memory
- Input/Output Organization
- System Bus
- Interrupts
- RISC and CISC
- Pipelining
- I/O Techniques
- Direct Memory Access (DMA)
Important MCQs
1. Which unit is known as the brain of a computer?
A. RAM
B. CPU
C. Hard Disk
D. Monitor
Answer: B. CPU
2. Which component performs arithmetic and logical operations?
A. CU
B. ALU
C. RAM
D. Register
Answer: B. ALU
3. ALU stands for:
A. Arithmetic Logic Unit
B. Arithmetic Linear Unit
C. Advanced Logic Unit
D. Arithmetic Link Unit
Answer: A. Arithmetic Logic Unit
4. Which unit controls and coordinates the activities of the computer?
A. ALU
B. Control Unit
C. Memory Unit
D. Input Unit
Answer: B. Control Unit
5. Which is the fastest memory in the memory hierarchy?
A. Hard Disk
B. RAM
C. Cache
D. Registers
Answer: D. Registers
6. Cache memory is generally placed between:
A. CPU and main memory
B. Hard disk and printer
C. Keyboard and monitor
D. ROM and hard disk
Answer: A. CPU and main memory
7. Which memory is volatile?
A. ROM
B. RAM
C. SSD
D. CD-ROM
Answer: B. RAM
8. Which memory retains data even after power is switched off?
A. RAM
B. Cache
C. ROM
D. Register
Answer: C. ROM
9. What does CPU stand for?
A. Central Processing Unit
B. Central Program Unit
C. Computer Processing Utility
D. Central Peripheral Unit
Answer: A. Central Processing Unit
10. Which register normally holds the address of the next instruction to be fetched?
A. Accumulator
B. Program Counter
C. Instruction Register
D. Memory Data Register
Answer: B. Program Counter
11. Which register holds the currently fetched instruction?
A. PC
B. IR
C. MAR
D. ACC
Answer: B. IR
12. MAR stands for:
A. Memory Address Register
B. Memory Access Register
C. Main Address Register
D. Memory Allocation Register
Answer: A. Memory Address Register
13. MDR is associated with:
A. Data being transferred to or from memory
B. Only program addresses
C. CPU clock generation
D. Input device control only
Answer: A. Data being transferred to or from memory
14. Which bus carries memory addresses?
A. Data Bus
B. Address Bus
C. Control Bus
D. System Bus only
Answer: B. Address Bus
15. Which bus carries data between CPU, memory and I/O?
A. Address Bus
B. Data Bus
C. Control Bus
D. Instruction Bus
Answer: B. Data Bus
16. Which bus carries control signals?
A. Data Bus
B. Address Bus
C. Control Bus
D. Memory Bus
Answer: C. Control Bus
17. The instruction cycle generally begins with:
A. Execute
B. Fetch
C. Store
D. Decode
Answer: B. Fetch
18. Which phase interprets the fetched instruction?
A. Fetch
B. Decode
C. Execute
D. Write-back
Answer: B. Decode
19. Which addressing mode uses a constant value directly in the instruction?
A. Immediate
B. Indirect
C. Register Indirect
D. Indexed
Answer: A. Immediate
20. In register addressing mode, the operand is located in:
A. Main memory
B. A CPU register
C. Cache only
D. Secondary storage
Answer: B. A CPU register
21. Which memory is closest to the CPU?
A. Hard Disk
B. RAM
C. Cache
D. Register
Answer: D. Register
22. Which is generally faster?
A. Cache memory
B. Hard disk
C. Optical disk
D. Magnetic tape
Answer: A. Cache memory
23. Virtual memory uses:
A. Only CPU registers
B. Secondary storage as an extension of main memory
C. Only ROM
D. Only cache memory
Answer: B. Secondary storage as an extension of main memory
24. What is DMA?
A. Direct Memory Access
B. Data Memory Allocation
C. Direct Machine Access
D. Dynamic Memory Addressing
Answer: A. Direct Memory Access
25. DMA allows:
A. CPU to perform every data transfer itself
B. I/O devices to transfer data to/from memory with limited CPU involvement
C. Memory to control the CPU clock
D. ROM to replace RAM
Answer: B. I/O devices to transfer data to/from memory with limited CPU involvement
26. RISC stands for:
A. Reduced Instruction Set Computer
B. Rapid Instruction System Computer
C. Reduced Integrated System Computer
D. Random Instruction Set Computer
Answer: A. Reduced Instruction Set Computer
27. CISC stands for:
A. Complex Instruction Set Computer
B. Central Instruction System Computer
C. Computer Integrated System Circuit
D. Complex Integrated Software Computer
Answer: A. Complex Instruction Set Computer
28. Which architecture generally uses a smaller and simpler instruction set?
A. CISC
B. RISC
C. VLIW only
D. SIMD only
Answer: B. RISC
29. Pipelining is used to:
A. Increase instruction throughput
B. Increase hard disk capacity
C. Reduce RAM size
D. Replace the ALU
Answer: A. Increase instruction throughput
30. Which component stores intermediate results during processing?
A. Register
B. Keyboard
C. Monitor
D. Printer
Answer: A. Register
Quick Revision – Computer Organization
- CPU → Central Processing Unit.
- ALU → Performs arithmetic and logical operations.
- CU → Controls and coordinates CPU operations.
- Register → Very fast storage inside the CPU.
- PC → Holds the address of the next instruction.
- IR → Holds the current instruction.
- MAR → Holds a memory address.
- MDR → Holds data being transferred to/from memory.
- Cache → High-speed memory between CPU and main memory.
- RAM → Volatile main memory.
- ROM → Non-volatile memory.
- Address Bus → Carries addresses.
- Data Bus → Carries data.
- Control Bus → Carries control signals.
- Fetch → Retrieves an instruction.
- Decode → Interprets an instruction.
- Execute → Performs the required operation.
- DMA → Allows direct data transfer between I/O and memory with limited CPU involvement.
- RISC → Reduced Instruction Set Computer.
- CISC → Complex Instruction Set Computer.
- Pipelining → Improves instruction throughput by overlapping instruction stages.
- Virtual Memory → Uses secondary storage to extend the apparent memory available to programs.
Bihar STET Preparation Focus
For Bihar STET Computer Science 2026, give special attention to CPU organization, registers, instruction cycle, addressing modes, memory hierarchy, cache, RAM/ROM, buses, interrupts, DMA, RISC/CISC and pipelining. These topics are especially useful for objective-type questions and quick revision.
